Mastermind Game In Verilog
Here is a description of the project I’m needing, the first part (written plan of implementation) is due Tuesday morning. The final project is due May 10. It needs to be created using VERY basic Verilog code for use on an Altera DE2 board. Please email with questions.
“You are the design engineer and must create a working Mastermind game using the Altera DE2 board. You may
use Verilog modules and any of the logic gates and library parameterized modules. You may not use any other
programming language such as C.
Your game must at a minimum allow one human to play one game, either against another human or the
computer. It is up to you to decide how to
1) represent the colors
2) the codemaker will enter and store the code.
3) The codebreaker will enter a guess
4) the codemaker provides feedback with white and black pegs
5) Your game should keep track of the number of guesses entered by the codebreaker, so that the
game may end when the code is broken or the allowed number of guesses have been used.
The implementation details are up to you as the design engineer. Extra credit may be awarded for work above
and beyond the minimum project scope.
Project Deliverables and Deadlines:
Tuesday, April 26, 2011
Submit a written design document describing how you intend to implement the game on the Altera board,
including all you input signals, and your outputs. In other words, how will you be using switches, keys, hex
displays, leds, and vga display. This document should include both a written description of your preliminary
design, diagrams showing flow of inputs and outputs, state machines, and state tables.
Tuesday, May 10, 2011
Demonstrate your project solution in class. Submit a written document that tells the user how to play your game.
Think of your Mastermind solution as a product that you are going to sell. Tell the user how to play the game.
Example, how do you start a new game? Is there a reset? How does the code maker store the code? How do you
enter a guess?
